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| 19-2699; Rev 0; 2/03 DC-Coupled, UCSP 3.125Gbps Equalizer General Description The MAX3803 equalizer automatically provides compensation for transmission-medium losses encountered with FR4 stripline and cable in an incredibly small 2mm x 2.5mm package. It is ideal for backplane applications requiring up to 40in between the line card and the switch card or up to 10m of twin ax cable between racks. Its small size provides placement and routing flexibility. The CML inputs and outputs are DC-coupled and can be terminated to a supply as low as +1.1V. The MAX3803 operates from 0C to +85C and consumes 160mW at +3.3V. Features o DC-Coupled Input and Output to Terminations as Low as +1.1V o 2mm x 2.5mm UCSPTM o 1Gbps to 3.2Gbps Operating Range o Spans 40in (1m) of FR4 o Spans 10m, 28AWG Twin Ax o Receive Equalization to Reduce ISI MAX3803 Applications Backplane Interconnect Rack-to-Rack Interconnect Common-Mode Voltage Translation (LVDS, PECL, or CML) PART MAX3803UBP-T Ordering Information TEMP RANGE 0C to +85C PIN-PACKAGE 5 x 4 UCSP Pin Configuration appears at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. Typical Application Circuit LINE CARD +1.1V V VCC +3.3V MAC WITH SERDES 2 Rx Tx 40in (1m) VTI 2 IN PC BOARD BACKPLANE VCC VTO 2 OUT 2 Rx SWITCH ASIC WITH SERDES SWITCH CARD +1.1V V VCC FR4 STRIPLINE MAX3803 +3.3V VCC 2 Tx Rx 2 OUT MAX3803 VTO VTI IN 2 2 FR4 STRIPLINE Tx +1.1V V VCC +1.1V V VCC ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. DC-Coupled, UCSP 3.125Gbps Equalizer MAX3803 ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC, VTI, and VTO ..........................-0.5V to +6V Continuous Output Current ...............................-25mA to +25mA IN, OUT, EN............................................-0.5V to (VCC + 0.5V) Operating Ambient Temperature Range ................0C to +85C Storage Ambient Temperature Range...............-55C to +150C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. OPERATING CONDITIONS PARAMETER Supply Voltage Input Termination Voltage Output Termination Voltage Supply Noise Tolerance Operating Ambient Temperature Bit Rate CID NRZ data Consecutive identical digits SYMBOL VCC VTI VTO 10Hz f < 100Hz 100Hz f < 1MHz 1MHz f 2.5GHz 0 2.488 CONDITIONS MIN 3.0 1.1 1.1 100 40 10 25 85 3.125 100 C Gbps bits mVP-P TYP 3.3 MAX 3.6 VCC VCC UNITS V V V ELECTRICAL CHARACTERISTICS (Typical values are at +3.3V and at TA = +25C, unless otherwise noted. Specifications guaranteed over specified operating conditions.) PARAMETER Supply Current (Note 1) Output Driver Supply Current Input Swing (Note 1) Input Common-Mode Voltage Range Input Return Loss Input Resistance Output Swing (Notes 1, 3) Output Common-Mode Voltage Output Resistance Output Return Loss Output Transition Time Differential Skew tr, tf Single ended (Note 1) 100MHz to 2.5GHz 20% to 80% (Notes 2, 4) Difference in 50% crossing between OUT+ and OUT40 42.5 SYMBOL EN = high EN = low (Note 2) Measured differentially at point A (Figure 1) (Note 1) 100MHz to 2.5GHz Single ended (Note 1) EN = high EN = low 42.5 400 400 VTI 0.25V 10 50 450 30 VTO 0.112V 50 10 70 10 100 57.5 57.5 600 CONDITIONS MIN TYP 45 14 9 MAX 65 30 14 1000 VTI 0.10V UNITS mA mA mVP-P V dB mVP-P V dB ps ps 2 _______________________________________________________________________________________ DC-Coupled, UCSP 3.125Gbps Equalizer ELECTRICAL CHARACTERISTICS (continued) (Typical values are at +3.3V and at TA = +25C, unless otherwise noted. Specifications guaranteed over specified operating conditions.) PARAMETER SYMBOL 0in, 6-mil FR4 10in, 6-mil FR4 20in, 6-mil FR4 Residual Deterministic Jitter Output (2.5Gbps, CJTPAT) (Notes 2, 5) 30in, 6-mil FR4 40in, 6-mil FR4 3m Tensolite cable 5m Tensolite cable 10m Tensolite cable 0in, 6-mil FR4 Residual Deterministic Jitter Output (2.5Gbps, 27 PRBS + 100 CID) (Notes 2, 6) 10in, 6-mil FR4 20in, 6-mil FR4 30in, 6-mil FR4 3m Tensolite cable 0in, 6-mil FR4 10in, 6-mil FR4 20in, 6-mil FR4 Residual Deterministic Jitter Output (3.125Gbps, CJTPAT) (Notes 2, 7) 30in, 6-mil FR4 40in, 6-mil FR4 3m Tensolite cable 5m Tensolite cable Random Jitter Output Latency Low-Frequency Cutoff LVTTL Input High Voltage LVTTL Input Low Voltage LVTTL Input High Current LVTTL Input Low Current VIH VIL IIH IIL (Note 1) (Note 1) (Note 1) (Note 1) 1.5 0.5 10 10 (Notes 2, 4) From IN to OUT CONDITIONS MIN TYP 0.01 0.04 0.05 0.05 0.07 0.03 0.1 0.14 0.01 0.06 0.11 0.15 0.09 0.01 0.02 0.03 0.06 0.11 0.05 0.16 2 0.3 15 MAX 0.10 0.10 0.10 0.15 0.15 0.10 0.20 0.25 0.10 0.10 0.15 0.20 0.15 0.10 0.10 0.15 0.15 0.25 0.10 0.25 3 psRMS ns kHz V V A A UI UI UI UNITS MAX3803 Note 1: Note 2: Note 3: Note 4: Production tested at TA = +25C. Specifications over temperature are guaranteed by design and characterization. Specifications are guaranteed by design and characterization. Measured differentially at point C with 50 1% at each side (Figure 1). Using a 0000011111 or equivalent pattern at selected bit rate. Measured at 600mVP-P input voltage, 10m cable or 40in FR4, at 2.5Gbps and within 2in of output pins. Note 5: Difference in peak-to-peak deterministic jitter between reference points A and C in Figure 1. Evaluated at 2.5Gbps with CJTPAT. Note 6: Difference in peak-to-peak deterministic jitter between reference points A and C in Figure 1. Evaluated at 2.5Gbps with a PRBS 27 with 100 CIDs input pattern. Note 7: Difference in peak-to-peak deterministic jitter between reference points A and C in Figure 1. Evaluated at 3.125Gbps with CJTPAT. _______________________________________________________________________________________ 3 DC-Coupled, UCSP 3.125Gbps Equalizer MAX3803 Typical Operating Characteristics (VCC = +3.3V, VTI = +1.1V, VTO = +1.1V, and TA = +25C, unless otherwise noted.) 40in, 6-mil FR4 AT 3.125Gbps WITH CJTPAT 20ft TENSOLITE CABLE AT 2.48832Gbps WITH PRBS 223 - 1 30in, 6-mil FR4 AT 3.125Gbps WITH K28.5 (BEFORE EQUALIZATION, AFTER EQUALIZATION) (BEFORE EQUALIZATION, AFTER EQUALIZATION) (BEFORE EQUALIZATION, AFTER EQUALIZATION) MAX3803 toc01 MAX3803 toc02 MAX3803 toc03 150mV/div 150mV/div 150mV/div 100ps/div 100ps/div 680ps/div SUPPLY CURRENT vs. AMBIENT TEMPERATURE 90 80 SUPPLY CURRENT (mA) 70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 AMBIENT TEMPERATURE (C) 1 0 MAX3803 toc04 RANDOM JITTER vs. LENGTH (IN = 400mVP-P, PATTERN = K28.7) MAX3803 toc05 RANDOM JITTER vs. LENGTH (IN = 800mVP-P, PATTERN = K28.7) MAX3803 toc06 100 5 5 RANDOM JITTER (psRMS) 2.48832Gbps RANDOM JITTER (psRMS) 4 4 3 3 2 3.125Gbps 2 2.48832Gbps 3.125Gbps 1 10 20 30 40 50 0 10 20 30 40 50 LENGTH OF 6-mil FR4 STRIPLINE (in) LENGTH OF 6-mil FR4 STRIPLINE (in) RANDOM JITTER vs. INPUT AMPLITUDE (40in, 6-mil FR4 STRIPLINE, PATTERN = K28.7) MAX3803 toc07 DETERMINISTIC JITTER vs. BIT RATE (30in, 6-mil FR4 STRIPLINE, IN = 1000mVP-P) MAX3803 toc08 DETERMINISTIC JITTER vs. BIT RATE (33ft, 28AWG TENSOLITE CABLE, IN = 400mVP-P) PRBS 210 - 1 90 DETERMINISTIC JITTER (ps) 80 70 CJTPAT 60 K28.5 50 PRBS 27 - 1 MAX3803 toc09 5 80 70 DETERMINISTIC JITTER (ps) PRBS 210 - 1 60 50 40 30 K28.5 20 PRBS 27 - 1 100 RANDOM JITTER (psRMS) 4 2.48832Gbps 3 2 3.125Gbps 1 400 500 600 700 800 900 1000 INPUT AMPLITUDE (mVP-P) CJTPAT 40 2.0 2.3 2.6 2.9 3.2 3.5 2.0 2.3 2.6 2.9 3.2 3.5 BIT RATE (Gbps) BIT RATE (Gbps) 4 _______________________________________________________________________________________ DC-Coupled, UCSP 3.125Gbps Equalizer Typical Operating Characteristics (continued) (VCC = +3.3V, VTI = +1.1V, VTO = +1.1V, and TA = +25C, unless otherwise noted.) DETERMINISTIC JITTER vs. INPUT AMPLITUDE (40in, 6-mil FR4 STRIPLINE, 3.125Gbps) MAX3803 toc10 MAX3803 DETERMINISTIC JITTER vs. INPUT AMPLITUDE (30in, 6-mil FR4 STRIPLINE, 2.488Gbps) MAX3803 toc11 DETERMINISTIC JITTER vs. INPUT AMPLITUDE (33ft, 28AWG TENSOLITE CABLE, PATTERN = K28.5) MAX3803 toc12 60 55 DETERMINISTIC JITTER (ps) CJTPAT 50 45 40 35 K28.5 30 25 20 400 500 600 700 800 900 90 80 DETERMINISTIC JITTER (ps) 70 60 50 40 30 20 7 70 65 DETERMINISTIC JITTER (ps) 60 3.125Gbps 55 50 1.25Gbps 45 40 PRBS 27 WITH 100CIDs PRBS 2 - 1 1000 400 500 600 700 800 900 1000 400 500 600 700 800 900 1000 INPUT AMPLITUDE (mVP-P) INPUT AMPLITUDE (mVP-P) INPUT AMPLITUDE (mVP-P) DETERMINISTIC JITTER vs. LENGTH (IN = 800mVP-P, PATTERN = PRBS 210 - 1) 100 DETERMINISTIC JITTER (ps) 90 80 70 60 50 40 30 20 10 0 10 20 30 40 50 LENGTH OF 6-mil FR4 STRIPLINE (in) 2.48832Gbps 622.08Mbps MAX3803 toc13 DETERMINISTIC JITTER vs. LENGTH (IN = 600mVP-P, PATTERN = CJTPAT) 70 DETERMINISTIC JITTER (ps) 60 50 1.25Gbps 40 3.125Gbps 30 20 10 0 10 20 30 40 50 LENGTH OF 6-mil FR4 STRIPLINE (in) MAX3803 toc14 110 80 Pin Description PIN A1 A2 A3, A4 A5 B1 B5 C1 C5 D1, D5 D2, D3, D4 NAME VTO EN N.C. VTI OUT+ IN+ OUTINGND VCC Output Termination Voltage Enable. Connect to VCC to enable the equalizer core. Connect to GND to disable the equalizer core, TTL. Do not leave unconnected. No Connection Input Termination Voltage Positive Data Output, CML Positive Data Input, CML Negative Data Output, CML Negative Data Input, CML Supply Ground Core Supply Voltage FUNCTION _______________________________________________________________________________________ 5 DC-Coupled, UCSP 3.125Gbps Equalizer MAX3803 _______________Detailed Description ______and Applications Information The MAX3803 is an adaptive equalizer designed to extend the reach of transmission lines in high-frequency backplane and rack-to-rack interconnect applications. The MAX3803 automatically adjusts to attenuation caused by skin-effect and dielectric losses. Although optimized for coded and scrambled data between 2.488Gbps and 3.125Gbps, the MAX3803 provides effective compensation for rates between 1Gbps and 3.2Gbps. The MAX3803 consists of low common-mode input and output buffers, an equalizer core, a DC-offset-correction loop, and a limiting amplifier (Figure 2). Media Equalization Equalization at the input compensates for high-frequency loss encountered with FR4 stripline (edge-coupled) or 28AWG twin ax. The equalizer core is an amplifier with a self-adjusting frequency response. DC Cancellation Loop The DC cancellation loop removes the pulse-width distortion caused by internal offsets. The closed-loop response creates a low-frequency cutoff of approximately 15kHz, below which the offset control tracks the AC signal. This also sets the limit on the maximum time VCC +1.1V VTI VCC VCC Low Common-Mode Input and Output The MAX3803 permits DC-coupling to CML transmitters and receivers that require termination voltages as low as 1.1V and as high as VCC. Use the VTI and VTO pins to maintain compatible common-mode levels between the data source and load. VTI and VTO are independent and can be used to bridge two common-mode requirements without the use of DC-blocking capacitors. See Figure 3 and Figure 4 for the equivalent input and output structures. 50 IN+ VCC 50 INESD STRUCTURES A B C SIGNAL SOURCE 2 CONNECTOR 2 CONNECTOR MAX3803 2 IN OUT 2 Figure 3. CML Input Structure 40in EDGE-COUPLED TRANSMISSION LINE ON FR4 OR 10m 28AWG TWIN AX CABLE +1.1V VTO VCC VCC Figure 1. Backplane Interconnect 50 50 OUT+ OUT- VTI VCC VTO IN+ IN- CML INPUT EQUALIZER LIMITING AMPLIFER CML OUTPUT OUT+ OUT- ESD STRUCTURES DC CANCELLATION LOOP MAX3803 Figure 2. Functional Diagram 6 Figure 4. CML Output Structure _______________________________________________________________________________________ DC-Coupled, UCSP 3.125Gbps Equalizer required to reach a balanced mark/space ratio (i.e., 50%). This permits the use of scrambled data as found in SONET and SDH transmissions. Pin Configuration TOP VIEW 1 A VTO B OUT+ IN+ EN N.C. N.C. VTI 2 3 4 5 MAX3803 Limiting Amplifier The limiting amplifier limits the outputs of the equalizer so all frequencies are at the same output voltage level. Enable Function Connect the EN pin to VCC to enable the equalizer core. Connect the EN pin to GND to disable the equalizer core when valid data is not present to save power. When EN is low, the outputs are static with approximately 30mVP-P differential. This pin must be connected to VCC or GND. The MAX3803 is packaged in a 2.5mm x 2mm, 5 x 4 chip-scale package (USCP). The six center ball positions (B2, B3, B4, C2, C3, C4) are not populated, leaving fourteen perimeter balls. This package does not require underfill over an ambient temperature range of 0C to +85C. Thermal dissipation is provided through the GND connection. Go to Maxim's website, www.maximic.com, for the latest packaging information and details about UCSP layout and handling. MAX3803 C OUTD GND VCC VCC VCC GND IN- Packaging UCSP 2.5mm x 2mm Layout Techniques For best performance, use good high-frequency layout techniques. Filter voltage supplies, keep ground connections short, and use multiple vias where possible. Use controlled-impedance transmission lines to interface with the MAX3803 high-speed inputs and outputs. Power-supply decoupling should be placed as close to the VCC as possible. To reduce feedthrough, isolate input signals from output signals. _______________________________________________________________________________________ 7 DC-Coupled, UCSP 3.125Gbps Equalizer MAX3803 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 5x4 UCSP.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. |
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